US 12,136,450 B2
Memory and operation method of memory with repairing and random pulse generating capability
Woongrae Kim, Gyeonggi-do (KR); Yoonna Oh, Gyeonggi-do (KR); and Chul Moon Jung, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Aug. 31, 2022, as Appl. No. 17/899,785.
Prior Publication US 2023/0335175 A1, Oct. 19, 2023
Int. Cl. G11C 11/406 (2006.01); G11C 29/00 (2006.01); G11C 29/52 (2006.01)
CPC G11C 11/40615 (2013.01) [G11C 11/40618 (2013.01); G11C 29/52 (2013.01); G11C 29/785 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A method for operating a memory, the method comprising:
receiving an active command and a row address for a first row;
confirming that a portion of columns of the first row is replaced with a portion of columns of a second row;
activating the first row and the second row in response to the active command for the first row;
confirming activation of a random pulse;
selecting a row address corresponding to the first row when a number of times that the first row is activated during the activation of the random pulse is one of odd and even numbers;
selecting a row address corresponding to the second row when the number is the other one of the odd and even numbers; and
sampling the selected row address as a sampling address.