US 12,136,449 B2
Capacitor structure and method of forming the same
Liang Chen, Wuhan (CN); Cheng Gan, Wuhan (CN); Xin Wu, Wuhan (CN); and Wei Liu, Wuhan (CN)
Assigned to YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed by YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed on Dec. 14, 2021, as Appl. No. 17/550,604.
Application 17/550,604 is a continuation of application No. 16/367,298, filed on Mar. 28, 2019, granted, now 11,232,825.
Application 16/367,298 is a continuation of application No. PCT/CN2019/075366, filed on Feb. 18, 2019.
Prior Publication US 2022/0101906 A1, Mar. 31, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 11/24 (2006.01); G11C 11/404 (2006.01); H01L 49/02 (2006.01); H10B 12/00 (2023.01)
CPC G11C 11/24 (2013.01) [G11C 11/404 (2013.01); H01L 28/40 (2013.01); H10B 12/395 (2023.02)] 17 Claims
OG exemplary drawing
 
1. A capacitor, comprising:
a substrate;
at least two conductive plates formed in the substrate and extending from a first surface to a second surface of the substrate;
at least one insulating structure formed between two adjacent conductive plates of the at least two conductive plates and extending from the first surface to the second surface of the substrate;
a plurality of contacts, each extending into respective one of the at least two conductive plates, wherein a material of the at least two conductive plates comprises silicon with P type dopant or N type dopant; and
a dielectric layer formed on the first surface of the substrate, wherein the plurality of contacts extending into the dielectric layer,
wherein at least two of first conductive plates of the at least two conductive plates are connected to a first polarity, at least two of second conductive plates of the at least two conductive plates are connected to a second polarity, and the first polarity and the second polarity are opposite polarities,
wherein the at least two of first conductive plates and the at least two of second conductive plates are interlaced in a cross-sectional view, and
wherein a first insulating structure of the at least one insulating structure is close-shaped in a plan view and insulates the at least two conductive plates from memory cells on the first surface of the substrate.