US 12,136,387 B2
Frame insertion and frame rate sequencing for panel glitch prevention
Jie Won Ryu, San Jose, CA (US); Ing-Jye Wang, Saratoga, CA (US); Alex H Pai, Milpitas, CA (US); Alexandre V Gauthier, Santa Clara, CA (US); Ardra Singh, San Francisco, CA (US); Arthur L Spence, San Jose, CA (US); Gihoon Choo, San Jose, CA (US); Hyunsoo Kim, San Diego, CA (US); Hyunwoo Nho, Palo Alto, CA (US); Jenny Hu, Santa Clara, CA (US); Graeme M Williams, San Diego, CA (US); Jongyup Lim, San Jose, CA (US); Kingsuk Brahma, Mountain View, CA (US); Marc J DeVincentis, Palo Alto, CA (US); Peter F Holland, Los Gatos, CA (US); and Shawn P Hurley, Sunnyvale, CA (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Jul. 19, 2023, as Appl. No. 18/355,342.
Claims priority of provisional application 63/393,672, filed on Jul. 29, 2022.
Prior Publication US 2024/0038154 A1, Feb. 1, 2024
Int. Cl. G09G 3/30 (2006.01); G09G 3/3208 (2016.01); G09G 3/36 (2006.01)
CPC G09G 3/3208 (2013.01) [G09G 2310/08 (2013.01); G09G 2320/0266 (2013.01); G09G 2320/0626 (2013.01); G09G 2340/0435 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An electronic device comprising:
processing circuitry configured to generate a first frame of image content and a second frame of image content, wherein the second frame of image content is different from the first frame of image content; and
a display configured to display the first frame of image content at a first refresh rate and, in response to receiving the second frame of image content, initially increase the first refresh rate to a second refresh rate before tapering back to the first refresh rate while displaying the second frame of image content.