US 12,136,381 B2
Display device and tiled display device including the same
Jun Ki Jeong, Yongin-si (KR); Hyun Joon Kim, Hwaseong-si (KR); Kye Uk Lee, Seoul (KR); Sang Jin Jeon, Hwaseong-si (KR); and Jung Hwan Hwang, Seongnam-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Gyeonggi-Do (KR)
Filed by Samsung Display Co., LTD., Yongin-si (KR)
Filed on Jun. 17, 2022, as Appl. No. 17/842,927.
Claims priority of application No. 10-2021-0123718 (KR), filed on Sep. 16, 2021.
Prior Publication US 2023/0082959 A1, Mar. 16, 2023
Int. Cl. G09G 3/32 (2016.01)
CPC G09G 3/32 (2013.01) [G09G 2300/026 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/0297 (2013.01); G09G 2330/04 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A display device comprising:
a display area which displays an image; and
a non-display area disposed around the display area and comprising a pad part,
wherein the display area comprises:
unit pixels of a first pixel row which are unit pixels arranged in a first direction along the first pixel row, wherein each of the unit pixels of the first pixel row includes pixels which emit light of different colors, and the first direction is a direction crossing an extending direction of data lines;
unit pixels of a second pixel row which are unit pixels arranged in the first direction along the second pixel row next to the first pixel row, wherein each of the unit pixels of the second pixel row includes pixels which emit light of different colors; and
pixel circuits of a first circuit row which are pixel circuits arranged in the first direction along the first circuit row, wherein the pixel circuits of the first circuit row are electrically connected to pixels of the unit pixels of the first pixel row, respectively;
unit pixels of a third pixel row which are unit pixels arranged in the first direction along the third pixel row next to the second pixel row, wherein each of the unit pixels of the third pixel row includes pixels which emit light of different colors; and
a demultiplexer disposed between the second pixel row and the third pixel row,
wherein the first pixel row and the first circuit row are spaced apart from each other with the second pixel row interposed therebetween,
the first circuit row is disposed between the demultiplexer and the third pixel row.