US 12,135,900 B2
Memory polling method, memory storage device and memory control circuit unit
Qi-Ao Zhu, Anhui (CN); Jing Zhang, Anhui (CN); Kuai Cao, Anhui (CN); Xin Wang, Anhui (CN); Xu Hui Cheng, Anhui (CN); and Wan-Jun Hong, Anhui (CN)
Assigned to Hefei Core Storage Electronic Limited, Anhui (CN)
Filed by Hefei Core Storage Electronic Limited, Anhui (CN)
Filed on Oct. 13, 2021, as Appl. No. 17/500,901.
Claims priority of application No. 202111146180.0 (CN), filed on Sep. 28, 2021.
Prior Publication US 2023/0098366 A1, Mar. 30, 2023
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0605 (2013.01); G06F 3/0652 (2013.01); G06F 3/0653 (2013.01); G06F 3/0679 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A memory polling method, adapted for a memory storage device, the memory storage device comprising a rewritable non-volatile memory module, the rewritable non-volatile memory module comprising a plurality of physical units, and the memory polling method comprising:
detecting a plurality of busy times corresponding to the plurality of physical units associated with types of command of a plurality of first commands and access mode of the plurality of physical units when executing the plurality of first commands, wherein the access mode includes TLC mode and SLC mode;
counting the plurality of busy times corresponding to the plurality of physical units;
setting the delay time to a longer busy time among the mode and median of the busy times according to the memory storage device being characterized as a product with low power consumption; and
transmitting a status request to the rewritable non-volatile memory module after the delay time.