US 12,135,659 B2
Communication in accordance with multiple interface protocols in semiconductor storage device
Mitsuhiko Kosakai, Fujisawa Kanagawa (JP); Masashi Uchino, Yokohama Kanagawa (JP); Fazul Kareem, Yokohama Kanagawa (JP); and Keisuke Takahashi, Kawasaki Kanagawa (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by KIOXIA CORPORATION, Tokyo (JP)
Filed on Aug. 16, 2021, as Appl. No. 17/403,582.
Claims priority of application No. 2021-046108 (JP), filed on Mar. 19, 2021.
Prior Publication US 2022/0300436 A1, Sep. 22, 2022
Int. Cl. G06F 13/16 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01); G11C 16/08 (2006.01)
CPC G06F 13/1668 (2013.01) [G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 16/08 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A semiconductor storage device comprising:
a memory cell array configured to store data in a non-volatile manner;
a first circuit configured to detect a first signal from an external device, the first signal being required when the external device communicates with the semiconductor storage device in accordance with a first interface protocol, but not required when the external device communicates with the semiconductor storage device in accordance with a second interface protocol different from the first interface protocol;
a second circuit configured to generate a second signal in a first state when the first circuit detects the first signal and in a second state when the first circuit does not detect the first signal, the second state being different from the first state; and
a terminal connectable to the external device, wherein
the second signal in the first state causes the terminal to have a first voltage state or a first impedance state, and
the second signal in the second state causes the terminal to have a second voltage state different from the first voltage state or a second impedance state different from the first impedance state.