US 12,135,653 B2
Flexible dictionary sharing for compressed caches
Alexander D. Breslow, Sunnyvale, CA (US); and John Kalamatianos, Boxborough, MA (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Jan. 23, 2023, as Appl. No. 18/158,212.
Application 18/158,212 is a continuation of application No. 17/231,957, filed on Apr. 15, 2021, granted, now 11,586,555.
Application 17/231,957 is a continuation of application No. 16/544,468, filed on Aug. 19, 2019, granted, now 10,983,915, issued on Apr. 20, 2021.
Prior Publication US 2023/0161710 A1, May 25, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 12/0895 (2016.01); H03M 7/30 (2006.01)
CPC G06F 12/0895 (2013.01) [H03M 7/3088 (2013.01); G06F 2212/1044 (2013.01); G06F 2212/608 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A cache comprising:
a data array;
a tag array; and
circuitry configured to store a dictionary identifier in an entry of the tag array, wherein the dictionary identifier identifies a dictionary used to compress data stored in the data array, and wherein the dictionary is one of a plurality of dictionaries in a structure comprising a plurality of entries, with each of the plurality of entries including an identification of a dictionary.