US 12,135,635 B1
Automated fault injection testing
Austin Fletcher, Keego Harbor, MI (US); Daniel Su, Arlington, VA (US); and Bradley Boccuzzi, Arlington, VA (US)
Assigned to Two Six Labs, LLC, Arlington, VA (US)
Filed by Two Six Labs, LLC, Arlington, VA (US)
Filed on Jan. 30, 2023, as Appl. No. 18/102,909.
Application 18/102,909 is a continuation of application No. 17/015,778, filed on Sep. 9, 2020, granted, now 11,567,855.
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 11/36 (2006.01); G06F 11/263 (2006.01); G06F 11/277 (2006.01)
CPC G06F 11/3644 (2013.01) [G06F 11/263 (2013.01); G06F 11/277 (2013.01); G06F 11/3692 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A testing device for forcing a control flow of an instruction sequence, comprising:
an interface to a target system for receiving an instruction sequence of machine instructions under analysis;
a memory adapted for storing the instruction sequence and executable by a processor;
a code disassembler in communication with the interface for identifying a candidate instruction in the instruction sequence under analysis stored in the memory;
a debugging utility configured to identify a memory location storing the candidate instruction;
the debugging utility configured to estimate a duration for execution to proceed to the memory location storing the candidate instruction;
an EMF (electromagnetic fault) inducer for performing the sample injection from an external disruptive occurrence directed to modifying a result of the candidate instruction stored in the memory location at an execution time based on the estimated duration; and
a results analyzer for evaluating a path result based on an execution path taken as a result of the sample injection.