US 12,135,622 B2
Dynamic hardware resource shadowing and memory error protection
Riaz Khan, Milpitas, CA (US); and Peter Geoffrey Jones, Campbell, CA (US)
Assigned to Cisco Technology, Inc., San Jose, CA (US)
Filed by Cisco Technology, Inc., San Jose, CA (US)
Filed on Oct. 11, 2023, as Appl. No. 18/484,765.
Application 18/484,765 is a continuation of application No. 18/164,246, filed on Feb. 3, 2023, granted, now 11,822,437.
Application 18/164,246 is a continuation of application No. 16/542,191, filed on Aug. 15, 2019, granted, now 11,599,424.
Prior Publication US 2024/0036993 A1, Feb. 1, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 11/14 (2006.01); G06F 3/06 (2006.01); G06F 13/40 (2006.01)
CPC G06F 11/1469 (2013.01) [G06F 3/0608 (2013.01); G06F 3/0652 (2013.01); G06F 3/0673 (2013.01); G06F 13/4027 (2013.01); G06F 2201/82 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A network device comprising:
one or more processors; and
memory having instructions stored thereon that, when executed by the one or more processors, cause the network device to:
track read accesses of a plurality of data plane resources of the network device through a bus interconnect;
determine, for each read access, whether a shadow copy of a corresponding data plane resource of the plurality of data plane resources is available, wherein the read access is considered a shadow hit if the shadow copy is available and a shadow miss hit if the shadow copy is not available;
generate a shadow copy of a first data plane resource of the plurality of data plane resources if a number of shadow misses associated with the first data plane resource meets an addition criterion, wherein the shadow copy is generated by at least one of: (i) creating an instance of the shadow copy and then synchronizing the shadow copy with configuration data stored in a data plane database, or (ii) generating a null structure of the first data plane resource and updating each instance in the null structure as subsequent read accesses are performed; and
perform a correction of the first data plane resource using the shadow copy of the first data plane resource responsive to receiving a memory error notification associated with the first data plane resource.