US 12,135,347 B2
Method for detecting and adjusting poor back drills in printed circuit boards
Michael Caprio, Monroe Township, NJ (US); Dwarkesh Patel, Piscataway, NJ (US); Hiren Patel, Hillsborough, NJ (US); Yubing Wang, Pennington, NJ (US); and Donald Eric Thompson, Fremont, CA (US)
Assigned to R&D Circuits, South Plainfield, NJ (US)
Filed by R&D Circuits, South Plainfield, NJ (US)
Filed on Jul. 21, 2021, as Appl. No. 17/381,757.
Prior Publication US 2023/0026067 A1, Jan. 26, 2023
Int. Cl. G01R 31/28 (2006.01); H05K 3/00 (2006.01); H05K 3/42 (2006.01); H05K 1/02 (2006.01); H05K 1/11 (2006.01)
CPC G01R 31/2805 (2013.01) [G01R 31/2812 (2013.01); H05K 3/0047 (2013.01); H05K 3/429 (2013.01); H05K 1/0268 (2013.01); H05K 1/115 (2013.01); H05K 2203/0207 (2013.01); H05K 2203/163 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A method for adjusting detected poor or failed back-drills in printed circuit boards (PCBs), comprising:
selecting a designed or configured of one of each printed circuit board;
measuring actual thickness of at least five different areas of each PCB;
comparing measured actual thickness of each of said at least five different areas of each PCB with a theoretical thickness of each PCB; and
adjusting a back drill depth for each of said at least five different areas of said PCB based on said measured actual thickness of each of said at least five different areas of said PCB such that a back drill depth for each said area is configured to produce a functional back drill within said area.