US 12,135,296 B2
Edge inspection of silicon wafers by image stacking
Asaf Schlezinger, Modi'in (IL)
Assigned to APPLIED MATERIALS, INC., Santa Clara, CA (US)
Filed by Applied Materials, Inc., Santa Clara, CA (US)
Filed on Apr. 29, 2022, as Appl. No. 17/661,299.
Prior Publication US 2023/0349838 A1, Nov. 2, 2023
Int. Cl. G01N 21/95 (2006.01); G06T 1/00 (2006.01)
CPC G01N 21/9503 (2013.01) [G06T 1/0007 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for inspecting a wafer, the method comprising:
moving a first wafer through a metrology unit;
capturing a first image of an edge of the first wafer;
moving a second wafer through the metrology unit after the first wafer;
capturing a second image of an edge of the second wafer;
combining the first image of the edge of the first wafer and the second image of the edge of the second wafer to form a virtual stack of the first image and the second image positioned side-by-side; and
identifying one or more defects on the edge of the first wafer or the edge of the second wafer based on the virtual stack.