US 12,134,557 B2
Arched membrane structure for MEMS device
Jhao-Yi Wang, Tainan (TW); Chin-Yu Ku, Hsinchu (TW); Wen-Hsiung Lu, Tainan (TW); Lung-Kai Mao, Kaohsiung (TW); and Ming-Da Cheng, Taoyuan (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on May 18, 2021, as Appl. No. 17/323,147.
Claims priority of provisional application 63/148,641, filed on Feb. 12, 2021.
Prior Publication US 2022/0259037 A1, Aug. 18, 2022
Int. Cl. B81C 1/00 (2006.01); B81B 3/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01)
CPC B81C 1/00158 (2013.01) [B81B 3/0072 (2013.01); H01L 25/0655 (2013.01); H01L 25/50 (2013.01); B81B 2203/0127 (2013.01); B81B 2203/033 (2013.01); B81C 2201/013 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
bonding a supporting substrate to a semiconductor substrate of a wafer, wherein a bonding layer is between, and is bonded to both of, the supporting substrate and the semiconductor substrate;
performing a first etching process to etch the supporting substrate and to form an opening, wherein the opening penetrates through the supporting substrate and stops on the bonding layer, and wherein the opening has substantially straight edges;
etching-through the bonding layer; and
performing a second etching process to extend the opening down into the semiconductor substrate, wherein a bottom portion of the opening is curved.