US 12,464,958 B2
Magnetoresistive random access memory (MRAM) device and method of forming the same
Chih-Wei Kuo, Tainan (TW); Hung-Chan Lin, Tainan (TW); and Chung Yi Chiu, Tainan (TW)
Assigned to United Microelectronics Corp., Hsinchu (TW)
Filed by United Microelectronics Corp., Hsinchu (TW)
Filed on Aug. 22, 2022, as Appl. No. 17/892,162.
Claims priority of application No. 111127043 (TW), filed on Jul. 19, 2022.
Prior Publication US 2024/0032441 A1, Jan. 25, 2024
Int. Cl. H10N 52/80 (2023.01); H10B 61/00 (2023.01); H10N 50/85 (2023.01); H10N 52/00 (2023.01); H10N 52/01 (2023.01)
CPC H10N 52/80 (2023.02) [H10B 61/00 (2023.02); H10N 50/85 (2023.02); H10N 52/00 (2023.02); H10N 52/01 (2023.02)] 18 Claims
OG exemplary drawing
 
1. A magnetoresistive random access memory (MRAM) device, comprising:
a magnetic tunnel junction (MTJ) structure disposed on a bottom electrode;
a first spin orbit torque (SOT) layer disposed on the MTJ structure;
a cap layer disposed on the first SOT layer;
a second SOT layer disposed on the cap layer;
an etch stop layer disposed on the second SOT layer;
an upper metal line layer penetrating though the etch stop layer and landed on the second SOT layer;
a protective layer covering a sidewall of the MTJ structure, a sidewall of the first SOT layer, and a sidewall of the cap layer;
an interlayer dielectric (ILD) layer disposed on the protective layer and laterally surrounding the MTJ structure, the first SOT layer, the cap layer, the second SOT layer, the etch stop layer, and the upper metal line layer;
a first lower metal line layer disposed directly under the bottom electrode, wherein the bottom electrode is electrically connected to a first transistor through the first lower metal line layer; and
a second lower metal line layer disposed aside the first lower metal line layer, wherein the upper metal line layer is electrically connected to the second lower metal line layer through a conductive via penetrating through the ILD layer and the protective layer, and the second lower metal line layer is electrically connected to a second transistor different from the first transistor.