US 12,464,929 B2
Organic light-emitting diode display panel comprising undercut in passivation layer and manufacturing method thereof
Wanliang Zhou, Shenzhen (CN)
Assigned to SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD., Shenzhen (CN)
Appl. No. 17/773,047
Filed by Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Shenzhen (CN)
PCT Filed Apr. 18, 2022, PCT No. PCT/CN2022/087364
§ 371(c)(1), (2) Date Apr. 29, 2022,
PCT Pub. No. WO2023/184609, PCT Pub. Date Oct. 5, 2023.
Claims priority of application No. 202210313901.0 (CN), filed on Mar. 28, 2022.
Prior Publication US 2025/0081805 A1, Mar. 6, 2025
Int. Cl. H10K 59/80 (2023.01); H10K 59/12 (2023.01)
CPC H10K 59/80522 (2023.02) [H10K 59/1201 (2023.02); H10K 59/873 (2023.02)] 18 Claims
OG exemplary drawing
 
1. A manufacturing method of an organic light-emitting diode display panel, comprising following steps:
providing a substrate;
forming a thin film transistor layer on the substrate, wherein the thin film transistor layer comprises a source electrode, a drain electrode, and an auxiliary cathode, and the auxiliary cathode is disposed in a same layer with the source electrode and the drain electrode;
forming a passivation layer on the thin film transistor layer, wherein the passivation layer comprises a first passivation layer and a second passivation layer, and the second passivation layer is located on a side of the first passivation layer away from the thin film transistor layer; and using an etching solution to etch the first passivation layer and the second passivation layer to respectively form a first through hole and a second through hole, wherein the first through hole and the second through hole are communicated and constitute an undercut structure, an etching rate of the etching solution to the first passivation layer is greater than an etching rate of the etching solution to the second passivation layer, the undercut structure exposes the auxiliary cathode; and
forming a cathode on the passivation layer, the cathode extends into the undercut structure and is connected to the auxiliary cathode;
wherein after forming the passivation layer on the thin film transistor layer, and before using the etching solution to etch the first passivation layer and the second passivation layer, the manufacturing method comprises:
forming a planarization layer on the passivation layer; and
using a halftone mask to pattern the planarization layer to form a third through hole and a first blind via in the planarization layer; and
wherein using the etching solution to etch the first passivation layer and the second passivation layer comprises:
etching the first passivation layer and the second passivation layer at the third through hole;
wherein after using the etching solution to etch the first passivation layer and the second passivation layer, the manufacturing method comprises:
performing dry etching at the first blind via to form a through hole from the first blind via; and
etching the first passivation layer and the second passivation layer at the through hole to form a contact hole to expose the source electrode of the thin film transistor layer.