US 12,464,910 B2
Display substrate and display device
Guoying Wang, Beijing (CN); Yicheng Lin, Beijing (CN); Ying Han, Beijing (CN); Mingi Chu, Beijing (CN); Pan Xu, Beijing (CN); and Xing Zhang, Beijing (CN)
Assigned to Beijing BOE Technology Development Co., Ltd., Beijing (CN)
Appl. No. 17/789,153
Filed by BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Aug. 12, 2021, PCT No. PCT/CN2021/112233
§ 371(c)(1), (2) Date Jun. 24, 2022,
PCT Pub. No. WO2022/052736, PCT Pub. Date Mar. 17, 2022.
Claims priority of application No. 202010953477.7 (CN), filed on Sep. 11, 2020.
Prior Publication US 2022/0392993 A1, Dec. 8, 2022
Int. Cl. H10K 59/131 (2023.01); H10K 59/12 (2023.01); H10K 59/126 (2023.01); H10K 59/80 (2023.01)
CPC H10K 59/131 (2023.02) [H10K 59/12 (2023.02); H10K 59/126 (2023.02); H10K 59/80522 (2023.02)] 18 Claims
OG exemplary drawing
 
1. A display substrate, comprising: a display area and a non-display area surrounding the display area; the display substrate further comprising a cathode, a first power signal line pattern and at least one driver chip;
wherein at least a portion of the cathode is located in the display area;
the at least one driver chip is located in the non-display area; and
the first power signal line pattern is located in the non-display area and is located on at least one side of the display area, and the first power signal line pattern comprises a first transmission portion and a first incoming line portion electrically connected to the first transmission portion; and the first transmission portion extends in a first direction, the first transmission portion is electrically connected to the cathode, the first incoming line portion extends in a second direction intersecting with the first direction, and the first incoming line portion is electrically connected to the at least one driver chip;
wherein the display substrate further comprises a second power signal line pattern, and the second power signal line pattern comprises a first sub-pattern and a plurality of second sub-patterns;
the first sub-pattern comprises a second transmission portion, and two second incoming line portions electrically connected to the second transmission portion, the two second incoming line portions are electrically connected to the at least one driver chip, and the first power signal line pattern is located between the two second incoming line portions;
the plurality of second sub-patterns is located in the display area, and the plurality of second sub-patterns is electrically connected to the second transmission portion; and
the second power signal line pattern is configured to transmit a positive power signal.