| CPC H10D 62/8171 (2025.01) [H10D 30/475 (2025.01); H10D 62/8503 (2025.01); H10D 62/854 (2025.01)] | 20 Claims |
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1. A power device comprising:
a substrate;
a buffer structure on the substrate;
a channel layer on the buffer structure,
a source electrode and a drain electrode on the channel layer,
a gate electrode between the source electrode and the drain electrode, wherein the buffer structure has
a plurality of buffer layers between the substrate and an active layer, the active layer including a nitride semiconductor,
the plurality of buffer layers being stacked on each other on the substrate,
each of the plurality of buffer layers having a super lattice structure and including a doped nitride semiconductor,
wherein the plurality of buffer layers have different compositions from each other, and
adjacent buffer layers from among the plurality of buffer layers have different doping concentrations from each other.
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