| CPC H10B 43/27 (2023.02) [H10B 41/27 (2023.02)] | 20 Claims |
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1. A semiconductor device, comprising:
a source structure;
a plurality of gate electrodes on the source structure, wherein the gate electrodes of the plurality of gate electrodes are stacked and spaced apart from each other in a first direction perpendicular to an upper surface of the source structure and extend in a second direction perpendicular to the first direction; and
a channel structure in a channel hole extending through the plurality of gate electrodes and in the first direction, the channel structure including a first dielectric layer adjacent a sidewall of the channel hole, a second dielectric layer on an internal side surface of the first dielectric layer opposite the sidewall of the channel hole, a channel layer on an internal side surface of the second dielectric layer opposite the sidewall of the channel hole, and a filling insulating layer on an internal side surface of the channel layer opposite the sidewall of the channel hole, and further including a channel pad layer in an upper end of the channel hole,
wherein the second dielectric layer includes a ferroelectric material, and
wherein the channel pad layer is in contact with the internal side surface of the first dielectric layer and covers an upper surface of the second dielectric layer, an upper surface of the channel layer, and an upper surface of the filling insulating layer.
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