US 12,464,709 B2
Semiconductor memory device with buried contacts and a fence
Hyeon Woo Jang, Suwon-si (KR); Soo Ho Shin, Hwaseong-si (KR); Dong Sik Park, Suwon-si (KR); Jong Min Lee, Hwaseong-si (KR); and Ji Hoon Chang, Yongin-si (KR)
Assigned to Samsung Electronics Co., Ltd., Suwon-Si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Oct. 23, 2023, as Appl. No. 18/492,105.
Application 18/492,105 is a continuation of application No. 17/493,671, filed on Oct. 4, 2021, granted, now 11,832,442.
Claims priority of application No. 10-2021-0019713 (KR), filed on Feb. 15, 2021.
Prior Publication US 2024/0057323 A1, Feb. 15, 2024
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/485 (2023.02) [H10B 12/0335 (2023.02); H10B 12/053 (2023.02); H10B 12/315 (2023.02); H10B 12/34 (2023.02); H10B 12/482 (2023.02); H10B 12/30 (2023.02)] 19 Claims
OG exemplary drawing
 
1. A method for fabricating a semiconductor memory device, the method comprising:
providing a substrate;
forming a gate structure extending in a first direction in the substrate;
forming a pre buried contact on the substrate;
etching the pre buried contact to form a trench, wherein the trench is formed on the gate structure;
forming a fence in the trench; and
forming a buried contact by etching a portion of the pre buried contact after forming the fence,
wherein the pre buried contact is selectively etched,
wherein the fence comprises a spacer film on side walls of the trench and extending in a second direction intersecting the first direction, and a filling film in the trench and on the spacer film,
wherein an upper surface of the spacer film is lower than an upper surface of the filling film with respect to the substrate, and
wherein the spacer film does not extend along a bottom surface of the trench.