| CPC H10B 12/34 (2023.02) [H10B 12/053 (2023.02)] | 11 Claims |

|
1. A semiconductor device comprising:
a trench formed in a substrate;
a gate dielectric layer covering sidewalls and a bottom surface of the trench;
a first gate electrode gap-filling a bottom portion of the trench over the gate dielectric layer;
a second gate electrode including a metal nitride which is the same as the first gate electrode over the first gate electrode and doped with a low work function adjusting element;
a buffer layer covering a top surface of the second gate electrode and the gate dielectric layer exposed over the second gate electrode; and
a capping layer gap-filling the trench over the buffer layer.
|