US 12,463,852 B2
Semiconductor device and electronic apparatus
Takao Katayama, Matsumoto (JP); Akihiro Fukuzawa, Hino (JP); Fumihito Baisho, Kai (JP); and Tsutomu Nonaka, Hino (JP)
Assigned to SEIKO EPSON CORPORATION, (JP)
Filed by SEIKO EPSON CORPORATION, Tokyo (JP)
Filed on Jul. 28, 2023, as Appl. No. 18/361,213.
Claims priority of application No. 2022-121541 (JP), filed on Jul. 29, 2022.
Prior Publication US 2024/0048414 A1, Feb. 8, 2024
Int. Cl. H04L 25/49 (2006.01); H03F 3/20 (2006.01); H03M 3/00 (2006.01); H04R 3/00 (2006.01)
CPC H04L 25/4902 (2013.01) [H03F 3/20 (2013.01); H03F 2200/03 (2013.01); H03M 3/30 (2013.01); H04R 3/00 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first modulation circuit configured to receive a first sound source signal, sigma-delta modulate a signal based on the first sound source signal, and output a first sigma-delta modulated signal;
a second modulation circuit configured to pulse-width modulate a signal based on the first sigma-delta modulated signal, and output a first pulse-width modulated signal;
a first modulation inspection circuit configured to inspect the first modulation circuit, the first modulation inspection circuit including a first comparison circuit, the first comparison circuit being configured to:
receive the first sigma-delta modulated signal and a reference signal having an expected value corresponding to the first sigma-delta modulated signal; and
compare between the first sigma-delta modulated signal and the reference signal to generate a first comparison result; and
a second modulation inspection circuit configured to inspect the second modulation circuit, wherein
the first modulation inspection circuit and the second modulation inspection circuit are separated from each other.