US 12,463,776 B2
Aperiodic zero power channel state information reference signal enhancement for multi-slot PDSCH rate matching
Jae Ho Ryu, San Diego, CA (US); Kazuki Takeda, Minato-ku (JP); Hobin Kim, San Diego, CA (US); and Hari Sankar, San Diego, CA (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Sep. 29, 2022, as Appl. No. 17/936,797.
Prior Publication US 2024/0113831 A1, Apr. 4, 2024
Int. Cl. H04L 5/00 (2006.01); H04L 1/00 (2006.01); H04W 72/23 (2023.01)
CPC H04L 5/0051 (2013.01) [H04L 1/0067 (2013.01); H04W 72/23 (2023.01)] 26 Claims
OG exemplary drawing
 
1. An apparatus for wireless communication at a user equipment (UE), comprising:
a memory; and
at least one processor coupled to the memory and configured to:
receive, in an initial slot among a plurality of slots, downlink control information (DCI) scheduling a physical downlink shared channel (PDSCH) over the plurality of slots, wherein the DCI triggers a set of aperiodic zero power channel state information reference signal (A-ZP-CSI-RS) resources;
receive a resource mapping configuration associated with the set of A-ZP-CSI-RS resources, wherein the resource mapping configuration indicates a slot periodicity and an initial symbol of a plurality of symbols spanning the plurality of slots for a respective A-ZP-CSI-RS resource in the set of A-ZP-CSI-RS resources; and
receive a PDSCH transmission in a slot of the plurality of slots using a rate matching pattern associated with the set of A-ZP-CSI-RS resources, wherein the rate matching pattern is based at least in part on the resource mapping configuration and the slot periodicity with respect to a slot offset value and a number of slot repetitions.