US 12,463,667 B2
Multiplexer
Norihiko Nakahashi, Nagaokakyo (JP)
Assigned to MURATA MANUFACTURING CO., LTD., Kyoto (JP)
Filed by Murata Manufacturing Co., Ltd., Nagaokakyo (JP)
Filed on Sep. 7, 2023, as Appl. No. 18/243,203.
Claims priority of application No. 2022-146741 (JP), filed on Sep. 15, 2022.
Prior Publication US 2024/0097714 A1, Mar. 21, 2024
Int. Cl. H04W 48/18 (2009.01); H03H 7/46 (2006.01); H04B 1/00 (2006.01)
CPC H04B 1/0057 (2013.01) [H03H 7/463 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A multiplexer comprising:
a common terminal;
a first input/output terminal;
a second input/output terminal;
a first filter circuit that is connected between the common terminal and the first input/output terminal and that has a pass band including a first frequency band;
a second filter circuit that is connected between the common terminal and the second input/output terminal and that has a pass band including a second frequency band higher than the first frequency band; and
an additional circuit connected in parallel to at least a portion of a path connecting the common terminal and the first input/output terminal; wherein
the additional circuit includes a resonator including a plurality of interdigital transducer electrodes on a piezoelectric substrate; and
in a case where a peak frequency for a response that occurs in a bandpass characteristic of the additional circuit and that is attributed to the interdigital transducer electrodes is f1, and a frequency included in a frequency higher than the second frequency band and that corresponds to a lowest impedance in an impedance characteristic at a time of viewing the first filter circuit, the second filter circuit, and the additional circuit from the common terminal is f2,
f2×(1−0.0012)≤f1≤f2×(1+0.0012)
is satisfied.