| CPC H03K 19/018521 (2013.01) [H03K 3/356113 (2013.01); H03K 17/223 (2013.01); H03K 19/00384 (2013.01)] | 20 Claims |
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1. A semiconductor device comprising:
a first power node configured to supply a first power supply voltage;
an output node configured to output a signal to an output pad; and
a plurality of unit circuits electrically connected to the output node and electrically connected to each other in parallel between the first power node and the output pad,
wherein each of the plurality of unit circuits includes a plurality of switch elements that are configured to be turned on and turned off responsive to an N-bit control code, where N is a natural number equal to or greater than 2, and at least two of the plurality of switch elements are electrically connected to each other in parallel between the first power node and the output pad,
wherein a first unit circuit of the plurality of unit circuits comprises at least a plurality of first switch elements electrically connected to each other in parallel to provide N+1 current paths between the first power node and the output node,
wherein a first current path of the N+1 current paths is configured to have a smallest current to flow, and the (N+1)th current path is configured to have a largest current to flow, and
wherein while the signal is output by the output node, at least one of the first current path and the (N+1)th current paths in the first unit circuit is blocked.
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