| CPC H03K 5/1565 (2013.01) [G11C 7/222 (2013.01)] | 18 Claims |

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1. A duty cycle correction method adapted for correcting a duty cycle of a clock signal by using a duty cycle corrector (DCC), comprising:
performing control on the duty cycle corrector to correct the clock signal and storing a control result after the control is finished, wherein the duty cycle corrector comprises a sensing circuit and an adjustment circuit. and wherein
in response to the clock signal being input to the adjustment circuit, the adjustment circuit adjusts the duty cycle of the clock signal and outputs an output clock, and the sensing circuit senses a variation of the output clock to generate a trim value of the duty cycle; and
the adjustment circuit repeatedly adjusts the duty cycle of the clock signal according to the trim value generated by the sensing circuit to output the output clock, so that the duty cycle of the output clock is trimmed to approximately 50%; and
updating a delay of the duty cycle corrector by the stored control result before a next toggle of the clock signal.
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