US 12,463,606 B2
Power amplifier circuit
Masatoshi Hase, Kyoto (JP)
Assigned to MURATA MANUFACTURING CO., LTD., Kyoto (JP)
Filed by Murata Manufacturing Co., Ltd., Kyoto (JP)
Filed on Nov. 9, 2022, as Appl. No. 18/053,801.
Claims priority of application No. 2021-186221 (JP), filed on Nov. 16, 2021.
Prior Publication US 2023/0155558 A1, May 18, 2023
Int. Cl. H03F 3/21 (2006.01); H03F 3/213 (2006.01)
CPC H03F 3/211 (2013.01) [H03F 3/213 (2013.01); H03F 2200/369 (2013.01); H03F 2200/451 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A power amplifier circuit comprising:
a plurality of amplifying transistors comprising a first amplifying transistor and a second amplifying transistor, the plurality of amplifying transistors being electrically cascade-connected, each of the plurality of amplifying transistors being configured to amplify a signal supplied to a base or gate thereof and to output an amplified signal;
a first resistive circuit element having a first end, and a second end connected to the base or gate of the first amplifying transistor;
a second resistive circuit element having a first end, and a second end connected to the base or gate of the second amplifying transistor;
a first bias supplying transistor having an emitter or source connected to the first end of the first resistive circuit element;
a second bias supplying transistor having an emitter or source connected to the first end of the second resistive circuit element; and
a bias current compensation transistor having a base or gate connected to the first end of the first resistive circuit element, a collector or drain connected to a node between the emitter or source of the second bias supplying transistor and the first end of the second resistive circuit element, and an emitter or source connected to ground.