| CPC H02M 7/53873 (2013.01) [H02M 1/0043 (2021.05); H02M 7/5395 (2013.01); H02M 7/529 (2013.01)] | 20 Claims |

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1. An inverter circuit comprising input terminals, output terminals, and at least four semiconductor switches, the inverter circuit configured to:
receive direct current (DC) input power at the input terminals and output alternating current (AC) power at the output terminals; and
receive control signals from a controller, the controller comprising processing circuitry, wherein the control signals modulate a switching frequency for the inverter circuit based at least on an instantaneous AC output current and instantaneous AC output voltage at the output terminals, wherein the switching frequency is further based on a predetermined first AC output current, wherein for at least one operating mode the predetermined first AC output current is such that each switch is configured to turn ON with zero voltage switching (ZVS).
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