| CPC H02M 7/53873 (2013.01) [H02M 1/0009 (2021.05); H02M 1/088 (2013.01)] | 17 Claims |

|
1. A circuit comprising:
a first field effect transistor (FET);
a first comparator configured to detect a current through the first FET;
a second FET;
a second comparator configured to detect a current through the second FET;
a timer configured to set the first FET and the second FET into an off state after a time TMAX elapses; and
a control circuitry, wherein the control circuitry is configured to:
set TMAX to a value greater than a switching cycle of a rectifier; and
iteratively reduce the TMAX until a value is identified that sets the first FET and the second FET into the off state before the first comparator detects that current through the first FET has stopped.
|