US 12,463,533 B2
Bi-directional synchronous bootstrapping
Nathan Miles Ellis, Emeryville, CA (US); and Robert C. N. Pilawa-Podgurski, Alameda, CA (US)
Assigned to THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, Oakland, CA (US)
Filed by THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, Oakland, CA (US)
Filed on Feb. 12, 2024, as Appl. No. 18/439,364.
Application 18/439,364 is a continuation of application No. PCT/US2022/075413, filed on Aug. 24, 2022.
Claims priority of provisional application 63/237,086, filed on Aug. 25, 2021.
Prior Publication US 2024/0195295 A1, Jun. 13, 2024
Int. Cl. H02M 3/158 (2006.01); H02M 1/00 (2006.01); H02M 3/07 (2006.01); H03K 17/687 (2006.01)
CPC H02M 3/07 (2013.01) [H02M 1/0045 (2021.05); H03K 17/6871 (2013.01); H03K 2217/0063 (2013.01); H03K 2217/0072 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A cascaded bootstrapping network, comprising:
a plurality of cascaded gate drivers between a high-side and a low-side of the cascaded bootstrapping network;
wherein said plurality of gate drivers comprises a plurality of bidirectional active switches configured for synchronous bootstrapping;
a low-side ground-referenced bias voltage supply for upward charge flow to the gate drivers; and
a high-side bias voltage supply configured for enabling additional injection of charge into the bootstrapping network, including high-side to low-side downward charge so that said bootstrapping network is configured for bidirectional charge flow to the gate drivers, and wherein balanced delivery of charge is maintained.