US 12,463,523 B2
Integrated circuit device
Haruki Kamikura, Chino (JP); and Kinya Matsuda, Matsumoto (JP)
Assigned to SEIKO EPSON CORPORATION, Tokyo (JP)
Filed by SEIKO EPSON CORPORATION, Tokyo (JP)
Filed on Mar. 28, 2024, as Appl. No. 18/620,294.
Claims priority of application No. 2023-055184 (JP), filed on Mar. 30, 2023.
Prior Publication US 2024/0333128 A1, Oct. 3, 2024
Int. Cl. H02M 7/02 (2006.01); H02M 1/00 (2006.01); H02M 3/155 (2006.01); H02M 7/06 (2006.01)
CPC H02M 1/0048 (2021.05) [H02M 1/0025 (2021.05); H02M 3/155 (2013.01); H02M 7/06 (2013.01)] 9 Claims
OG exemplary drawing
 
1. An integrated circuit device comprising:
a semiconductor substrate set at a substrate potential;
a rectifier circuit configured to rectify an AC voltage by a rectifier element provided at the semiconductor substrate and output a rectified voltage; and
a bandgap reference circuit provided at the semiconductor substrate and configured to generate a reference voltage based on the rectified voltage, wherein
the bandgap reference circuit includes
an operational amplifier having a first input terminal and a second input terminal,
a first diode element provided between the first input terminal and a substrate potential node,
a resistor and a second diode element provided in series between the second input terminal and the substrate potential node,
a first capacitor provided between the first input terminal and the substrate potential node, and
a second capacitor provided between the second input terminal and the substrate potential node.