US 12,463,179 B2
Semiconductor package and method for fabricating the same
Won Hee Hwang, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Apr. 19, 2023, as Appl. No. 18/303,360.
Claims priority of application No. 10-2022-0067000 (KR), filed on May 31, 2022.
Prior Publication US 2023/0387080 A1, Nov. 30, 2023
Int. Cl. H01L 25/065 (2023.01); H01L 21/56 (2006.01); H01L 25/00 (2006.01)
CPC H01L 25/0657 (2013.01) [H01L 21/56 (2013.01); H01L 25/50 (2013.01); H01L 2225/06562 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package comprising:
a substrate;
a plurality of first semiconductor chips on the substrate and spaced apart from each other in a first direction;
a plurality of second semiconductor chips on the plurality of first semiconductor chips;
a spacer between an uppermost one of the plurality of first semiconductor chips and a lowermost one of the plurality of second semiconductor chips, the spacer comprising a plurality of trenches extending in the first direction; and
a mold layer within the plurality of trenches.