| CPC H01L 23/49568 (2013.01) [H01L 21/565 (2013.01); H01L 23/3121 (2013.01); H01L 23/49531 (2013.01); H01L 23/49562 (2013.01); H01L 23/49565 (2013.01); H01L 23/49575 (2013.01); H01L 23/66 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 25/072 (2013.01); H01L 23/552 (2013.01); H01L 2223/6611 (2013.01); H01L 2223/6672 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48155 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/1033 (2013.01); H01L 2924/30111 (2013.01)] | 11 Claims |

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1. A semiconductor device, comprising:
a package having a top surface and a bottom surface;
a semiconductor element arranged in the package; and
a base arranged in the package and on which the semiconductor element is mounted,
wherein:
the base comprises a lead frame body to which the semiconductor element is mounted, and a plurality of ground terminals provided on a peripheral edge of the lead frame body,
the lead frame body comprises a first heat dissipation region disposed in a center of the lead frame body in plan view and is configured from a columnar region protruding in a direction from the bottom surface toward the top surface of the package, and a second heat dissipation region that is a region surrounding the first heat dissipation region in the plan view,
the plurality of ground terminals contact the second heat dissipation region and extends outwardly,
a top surface of the first heat dissipation region is exposed to the top surface of the package, and
a bottom surface of the second heat dissipation region is exposed to the bottom surface of the package.
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