US 12,463,091 B2
Methods of forming semiconductor device structures
Yi-Wen Pan, New Taipei (TW); You-Lan Li, Hsinchu (TW); and Chung-Chi Ko, Nantou (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Jan. 6, 2024, as Appl. No. 18/406,151.
Application 18/406,151 is a continuation of application No. 17/406,920, filed on Aug. 19, 2021, granted, now 11,901,219.
Prior Publication US 2024/0153814 A1, May 9, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/768 (2006.01); H01L 21/762 (2006.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01)
CPC H01L 21/76814 (2013.01) [H01L 21/76224 (2013.01); H01L 21/76877 (2013.01); H10D 84/0149 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
forming an interconnect structure over a substrate, comprising:
forming a dielectric layer;
forming an opening in the dielectric layer;
forming a conductive feature in the opening;
forming a cap layer on the conductive feature, wherein the cap layer comprises a metal and is formed by a plasma enhanced chemical vapor deposition process; and then
performing a first ultraviolet (UV) curing process immediately after forming the cap layer, wherein electric charge accumulated on the dielectric layer as a result of the plasma enhanced chemical vapor deposition process is removed by the first UV curing process.