| CPC H01L 21/0254 (2013.01) [H01L 21/02609 (2013.01); H01L 21/0265 (2013.01); H10D 62/113 (2025.01); H10D 62/117 (2025.01); H10D 62/8503 (2025.01)] | 25 Claims |

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1. A semiconductor substrate comprising:
a template substrate comprising a first seed region, a growth restricting region, and a second seed region that are aligned in a first direction in a plan view;
a first semiconductor part that is positioned above the template substrate and connected to the first seed region; and
a second semiconductor part that is positioned above the template substrate and connected to the second seed region,
wherein
the first semiconductor part comprises (i) a first base, which is in contact with the template substrate and defined by a vertically extending section of the first semiconductor part that contacts the template substrate, and (ii) a first wing which is not in contact with the template substrate, is adjacent to the first base, and extends from the first base in the first direction,
the first wing comprises a wing edge which is positioned above and suspended over the growth restricting region and is spaced apart from the second semiconductor part by a gap interposed between the wing edge and the second semiconductor part,
the gap being configured to prevent physical contact between the first wing and the second semiconductor part,
the growth restricting region comprises a top surface on an upper side of the template substrate, the top surface having a first portion that faces the first wing, and
a first ratio, which is defined by a width of the first wing in the first direction divided by a shortest vertical distance from the first portion of the top surface of the growth restricting region to the wing edge, is equal to or larger than 5.0.
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