US 12,462,866 B2
Semiconductor device and control method for semiconductor device
Shigeyuki Suzuki, Tokyo (JP)
Assigned to RENESAS ELECTRONICS CORPORATION, Tokyo (JP)
Filed by Renesas Electronics Corporation, Tokyo (JP)
Filed on Nov. 20, 2023, as Appl. No. 18/515,210.
Claims priority of application No. 2022-185746 (JP), filed on Nov. 21, 2022.
Prior Publication US 2024/0170045 A1, May 23, 2024
Int. Cl. G11C 11/4076 (2006.01)
CPC G11C 11/4076 (2013.01) 13 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a reference potential storage unit storing a reference potential of a data signal;
a data signal reception circuit outputting a binary level data signal by comparing the data signal with the reference potential stored in the reference potential storage unit;
a data strobe signal reception circuit outputting a binary level data strobe signal by comparing one and the other of differential data strobe signals;
a data output unit sampling an output signal of the data signal reception circuit based on an output signal of the data strobe signal reception circuit; and
a control circuit adjusting the reference potential by initial training, causing the reference potential storage unit to store the adjusted reference potential, and updating the reference potential stored in the reference potential storage unit based on an intermediate potential between one and the other of the differential data strobe signals at a time of initial training and an intermediate potential between one and the other of differential data strobe signals at a time of data reading.