US 12,462,857 B2
Nonvolatile memory package, storage device including the same, and method of operating thereof
Anil Kavala, Yongin-si (KR); Youngmin Jo, Suwon-si (KR); Jungjune Park, Suwon-si (KR); and Chiweon Yoon, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Dec. 5, 2023, as Appl. No. 18/529,619.
Claims priority of application No. 10-2023-0033038 (KR), filed on Mar. 14, 2023.
Prior Publication US 2024/0312551 A1, Sep. 19, 2024
Int. Cl. G11C 7/22 (2006.01); G11C 16/32 (2006.01)
CPC G11C 7/22 (2013.01) [G11C 7/222 (2013.01); G11C 16/32 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A storage device comprising:
a plurality of memory chips;
a buffer chip connected to the plurality of memory chips; and
a controller connected to the buffer chip,
wherein the buffer chip is configured to periodically receive a first command from the controller, and perform a DQS oscillator enable operation in response to the first command, and
at least one memory chip among the plurality of memory chips and the buffer chip are configured to perform write training or read training when the DQS oscillator enable operation is performed.