US 12,462,775 B2
Transmitter circuit and display device including the same
Yong-Yun Park, Suwon-si (KR); Alankyongho Kim, Suwon-si (KR); Hyunwook Lim, Suwon-si (KR); and Yongil Kwon, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on May 18, 2023, as Appl. No. 18/199,163.
Claims priority of application No. 10-2022-0125220 (KR), filed on Sep. 30, 2022.
Prior Publication US 2024/0112650 A1, Apr. 4, 2024
Int. Cl. G09G 5/39 (2006.01)
CPC G09G 5/39 (2013.01) [G09G 2300/0452 (2013.01); G09G 2310/0297 (2013.01); G09G 2340/16 (2013.01); G09G 2356/00 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A transmitter circuit, comprising:
a run length detector configured to derive position information indicating first input data related to a threshold run length from among a plurality of input data in a predetermined bit unit, when a run length of first scrambled data for the first input data meets or exceeds the threshold run length in the predetermined bit unit;
a modifier configured to generate modified input data by inverting at least one bit of the first input data based on the position information; and
a scrambler configured to:
receive the modified input data from the modifier; and
generate second scrambled data by scrambling the modified input data with scrambling information.