US 12,462,754 B2
Sub-pixel, display device including the same, and driving method thereof
Sung Yoon Hwang, Yongin-si (KR); Gi Chang Lee, Yongin-si (KR); Sang Yong No, Yongin-si (KR); and Kyung Ho Kim, Yongin-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Gyeonggi-Do (KR)
Filed by Samsung Display Co., LTD., Yongin-si (KR)
Filed on Jun. 30, 2024, as Appl. No. 18/759,934.
Claims priority of application No. 10-2023-0136078 (KR), filed on Oct. 12, 2023.
Prior Publication US 2025/0124866 A1, Apr. 17, 2025
Int. Cl. G09G 3/3233 (2016.01)
CPC G09G 3/3233 (2013.01) [G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0852 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/08 (2013.01); G09G 2320/02 (2013.01); G09G 2320/041 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A sub-pixel comprising:
a first transistor including a first electrode connected to a first node, a second electrode connected to a first power line, to which a first driving voltage is applied, and a gate electrode connected to a second node;
a second transistor including a first electrode connected to the first node, a second electrode connected to the second node, and a gate electrode connected to a first sub-gate line;
a third transistor including a first electrode connected to one of a plurality of data lines, a second electrode connected to a third node, and a gate electrode connected to a second sub-gate line;
a fourth transistor including a first electrode connected to the third node, a second electrode connected to a second power line, to which a reference voltage is applied, and a gate electrode connected to a first emission control line;
a fifth transistor including a first electrode connected to the first node, a second electrode connected to a fourth node, and a gate electrode connected to a second emission control line;
a sixth transistor including a first electrode connected to the fourth node, a second electrode connected to a third power line, to which an initialization voltage is applied, and a gate electrode connected to a third sub-gate line;
a capacitor including a first electrode connected to the second node, and a second electrode connected to the third node;
a light emitting element including a first electrode connected to the fourth node, and a second electrode connected to a fourth power line, to which a second driving voltage is applied; and
wherein an emission control signal input to the second emission control line is a phase-delayed signal by one horizontal period from an emission control signal input to the first emission control line.