US 12,462,749 B2
Pixel circuit and display device including the same
Yong Won Lee, Paju-si (KR); Do Hyun Kim, Paju-si (KR); and Hyun Soo Lee, Paju-si (KR)
Assigned to LG Display Co., Ltd., Seoul (KR)
Filed by LG Display Co., Ltd., Seoul (KR)
Filed on Oct. 12, 2023, as Appl. No. 18/486,017.
Claims priority of application No. 10-2023-0009820 (KR), filed on Jan. 26, 2023.
Prior Publication US 2024/0257743 A1, Aug. 1, 2024
Int. Cl. G09G 3/3233 (2016.01)
CPC G09G 3/3233 (2013.01) [G09G 2300/0819 (2013.01); G09G 2300/0852 (2013.01); G09G 2310/0262 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/045 (2013.01); G09G 2330/021 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A pixel circuit comprising:
a driving element including a first electrode connected to a first node, a gate electrode connected to a second node, and a second electrode connected to a third node;
a capacitor having a first electrode connected to the second node and a second electrode connected to the third node;
a first switch element connected between a data line to which a data voltage of pixel data is applied and the second node to be turned on in response to a first gate signal;
a second switch element connected between the first node and the second node to be turned on in response to a second gate signal;
a third switch element configured to be turned on in response to the second gate signal;
a fourth switch element configured to be turned on in response to a third gate signal to connect a first voltage node to which a pixel driving voltage is applied to the first node; and
a light emitting element including an anode electrode connected to the third node and a cathode electrode connected to a second voltage node to which a cathode voltage is applied,
wherein a reference voltage is applied to the anode electrode of the light emitting element when the third switch element is turned on, and
wherein the pixel circuit is driven in the order of a first period, a second period, a third period, and a fourth period;
a voltage of the first gate signal is a gate-on voltage during the third period and is a gate off voltage during the first, second, and fourth periods;
a voltage of the second gate signal is the gate-on voltage during the first and second periods, and is the gate-off voltage during the third and fourth periods;
a voltage of the third gate signal is the gate-on voltage during the first and fourth periods, and is the gate-off voltage during the second and third periods;
the first switch element is turned on in response to the gate-on voltage of the first gate signal and turned off based on the gate-off voltage of the first gate signal;
the second and third switch elements are turned on in response to the gate-on voltage of the second gate signal and turned off based on the gate-off voltage of the second gate signal; and
the fourth switch element is turned on in response to the gate-on voltage of the third gate signal and turned off based on the gate-off voltage of the third gate signal.