US 12,462,741 B1
Display circuit and display device
Zhou Zhang, Hubei (CN); Xialing Liu, Hubei (CN); Changwen Ma, Hubei (CN); Pan Xu, Hubei (CN); and Zhe Li, Hubei (CN)
Assigned to WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD., Hubei (CN)
Filed by WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD., Hubei (CN)
Filed on Jan. 30, 2025, as Appl. No. 19/041,967.
Claims priority of application No. 202411197779.0 (CN), filed on Aug. 28, 2024.
Int. Cl. G09G 3/32 (2016.01); G02F 1/1335 (2006.01); G02F 1/1343 (2006.01)
CPC G09G 3/32 (2013.01) [G02F 1/133512 (2013.01); G02F 1/134309 (2013.01); G09G 2300/0819 (2013.01); G09G 2320/041 (2013.01); G09G 2320/046 (2013.01); G09G 2354/00 (2013.01); G09G 2360/144 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A display circuit, comprising:
multiple pixel driving circuits arranged in multiple stages, wherein each pixel driving circuit includes a switch transistor, a drive transistor, and a first control transistor, a gate of the switch transistor is connected to a first scan line, a first electrode of the switch transistor and a gate of the drive transistor is connected to a first node, the drive transistor is electrically connected to an anode of a light-emitting device, a gate of the first control transistor is connected to a second scan line, and a first electrode of the first control transistor is connected to the anode of the light-emitting device;
multiple collection circuits arranged in multiple stages, wherein each collection circuit comprises a second control transistor and a collection module, a gate of the second control transistor is connected to a third scan line, and a first electrode of the second control transistor is connected to the collection module;
a compensation circuit comprising a read signal line and an analog-to-digital conversion module, wherein the read signal line is connected to a second electrode of the second control transistor of each pixel driving circuit, is connected to a second electrode of the second control transistor of each collection circuit, and is further electrically connected to the analog-to-digital conversion module;
wherein when the display circuit is configured to be in a compensation phase, active voltage levels are respectively input into the first scan line and the second scan line, and an inactive voltage level is input into the third scan line, and
when the display circuit is configured to be in a collection phase, an inactive voltage level is input into the second scan line, and an active voltage level is input into the third scan line.