US 12,462,467 B2
Hardware acceleration for motion blur with ray tracing
Christopher A. Burns, Austin, TX (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Dec. 12, 2023, as Appl. No. 18/537,388.
Prior Publication US 2025/0191275 A1, Jun. 12, 2025
Int. Cl. G06T 15/06 (2011.01)
CPC G06T 15/06 (2013.01) 19 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
ray intersection accelerator circuitry configured to:
determine a ray time interval representation indicating upper and lower bounds that represent error bounds for a quantized ray time value of a ray; and
perform traversal operations for an acceleration data structure (ADS) that includes hierarchical bounding volumes, wherein the ADS includes a first node that specifies:
first coordinates of a bounding volume at a first motion blur time; and
second coordinates of the bounding volume at a second motion blur time;
wherein the ray intersection accelerator circuitry includes:
interpolation circuitry configured to operate on the first coordinates, the second coordinates, and the ray time interval representation to generate interpolated coordinates for the bounding volume; and
box test circuitry configured to determine whether the ray intersected the bounding volume based on the interpolated coordinates and coordinates of the ray.