US 12,462,324 B2
Multicore state caching in graphics processing
Ian King, Hertfordshire (GB)
Assigned to Imagination Technologies Limited, Kings Langley (GB)
Filed by Imagination Technologies Limited, Kings Langley (GB)
Filed on Mar. 28, 2023, as Appl. No. 18/127,554.
Claims priority of application No. 2204508 (GB), filed on Mar. 30, 2022; and application No. 2204510 (GB), filed on Mar. 30, 2022.
Prior Publication US 2023/0377088 A1, Nov. 23, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06T 1/20 (2006.01); G06F 9/48 (2006.01); G06F 15/80 (2006.01)
CPC G06T 1/20 (2013.01) [G06F 9/4881 (2013.01); G06F 15/80 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A graphics processing unit comprising a plurality of cores, wherein one of the plurality of cores comprises a first master unit configured to:
receive a set of image rendering tasks and state information, wherein the state information comprises elements of state information required for processing the image rendering tasks;
store the state information in a memory;
split the set of image rendering tasks into at least a first subset of tasks and a second subset of tasks;
assign the first subset of tasks to a first core of the plurality of cores;
assign the second subset of tasks to a second core of the plurality of cores;
transmit an indication of at least a first portion of the state information to the first core;
transmit an indication of at least a second portion of the state information to the second core;
transmit an indication of the first subset of tasks to the first core;
transmit an indication of the second subset of tasks to the second core; and
wherein each core of the plurality of cores comprises a slave unit configured to perform image rendering tasks.