US 12,462,149 B2
Method for memory allocation during execution of a neural network
Laurent Folliot, Gourdon (FR); Mirko Falchetto, Milan (IT); and Pierre Demaj, Nice (FR)
Assigned to STMicroelectronics S.r.l., Agrate Brianza (IT); and STMicroelectronics (Rousset) SAS, Rousset (FR)
Filed by STMicroelectronics S.r.l., Agrate Brianza (IT); and STMicroelectronics (Rousset) SAS, Rousset (FR)
Filed on Nov. 19, 2021, as Appl. No. 17/455,770.
Claims priority of application No. 2013373 (FR), filed on Dec. 16, 2020.
Prior Publication US 2022/0188610 A1, Jun. 16, 2022
Int. Cl. G06N 3/063 (2023.01); G06F 12/02 (2006.01); G06N 3/04 (2023.01)
CPC G06N 3/063 (2013.01) [G06F 12/023 (2013.01); G06N 3/04 (2013.01); G06F 2212/20 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
determining an execution order of layers of an artificial neural network;
defining, in a heap memory zone of a volatile memory, a placement of an intermediate result buffer generated by each layer in accordance with the execution order of the layers;
determining a free area of the heap memory zone for an execution of each layer;
defining, in the free area of the heap memory zone, a placement of a temporary scratch buffer based on the execution order of the layers;
ordering the temporary scratch buffer associated with a respective layer from a largest buffer to a smallest buffer; and
queuing variable size scratch buffers after the smallest buffer before defining the placement of the temporary scratch buffer.