| CPC G06F 13/4291 (2013.01) [H04L 7/0008 (2013.01)] | 7 Claims |

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1. A serial communication interface device which transmits and receives a transmission start signal, a data signal, and a transmission end signal via a communication line, the serial communication interface device comprising:
a converter including a clock input port and a data input port, a clock output port and a data output port, a signal output port, and a signal input port;
a transmitter including an input port connected to the signal output port of the converter and an output port, and is configured to convert a first to a fourth signals received from the converter into a communication signal and transmit the communication signal to the communication line; and
a receiver including an input port for receiving the communication signal received from the communication line and an output port connected to the signal input port of the converter, and is configured to convert the communication signal into the first to the fourth signals and transmit the first to the fourth signals to the converter,
wherein in a first state where the serial communication interface device is a transmitter side,
the converter is configured to generate the first signal corresponding to rising of the clock signal received from the clock input port, the second signal corresponding to falling of the clock signal received from the clock input port, the third signal corresponding to rising of the data signal received from the data input port, and the fourth signal corresponding to falling of the data signal received from the data input port, set the transmission start signal in response to generating the fourth signal during a period where the clock signal is a first level, set the transmission end signal in response to generating of the third signal after generation of the first signal, and transmit the first to the fourth signals to the transmitter,
wherein in a second state where the serial communication interface device is a receiver side, the converter is configured to convert the first and the second signals received from the receiver into the clock signal based upon the first signal corresponding to rising of the clock signal and the second signal corresponding to falling of the clock signal, convert the third and the fourth signals received from the receiver into the data signal based upon the third signal corresponding to rising of the data signal and the fourth signal corresponding to falling of the data signal, transmit the converted clock signal to the clock output port and the converted data signal to the data output port, set the transmission start signal in response to receiving the fourth signal during a period where the clock signal is a first level, and set the transmission end signal in response to reception of the third signal after reception of the first signal.
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