US 12,461,862 B2
Address translation at a target network interface device
Yi Zou, Portland, OR (US); Arun Raghunath, Portland, OR (US); Scott D. Peterson, Beaverton, OR (US); Sujoy Sen, Beaverton, OR (US); and Yadong Li, Portland, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Jun. 26, 2021, as Appl. No. 17/359,554.
Prior Publication US 2021/0326270 A1, Oct. 21, 2021
Int. Cl. G06F 12/1072 (2016.01); G06F 3/06 (2006.01); G06F 12/02 (2006.01)
CPC G06F 12/1072 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0638 (2013.01); G06F 3/067 (2013.01); G06F 12/0292 (2013.01); G06F 2212/65 (2013.01); G06F 2212/7201 (2013.01)] 17 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a network interface device comprising:
a direct memory access (DMA) circuitry,
a memory interface,
network interface, and
circuitry to:
receive an access request with a target logical block address (LBA) in one or more packets from a sender network interface device;
based on a target media of the access request storing at least one object, translate the target LBA to an address and access content in the target media based on the address, wherein the translate the target LBA to the address comprises access a translation entry that maps the LBA to one or more of: a physical memory address or a virtual memory address; and
provide, to the target media, the access request with the translation of the target LBA.