US 12,461,835 B2
System and method for integrity monitoring of heterogeneous system-on-a-chip (SoC) based systems
Eric N. Anderson, Marion, IA (US); Matthew P. Corbett, Mount Vernon, IA (US); Russ D. Uthe, Ely, IA (US); and Jason R. Owen, Marion, IA (US)
Assigned to Rockwell Collins, Inc., Cedar Rapids, IA (US)
Filed by Rockwell Collins, Inc., Cedar Rapids, IA (US)
Filed on Apr. 18, 2024, as Appl. No. 18/639,523.
Prior Publication US 2025/0328439 A1, Oct. 23, 2025
Int. Cl. G06F 11/22 (2006.01)
CPC G06F 11/2221 (2013.01) 20 Claims
OG exemplary drawing
 
13. A method for integrity monitoring in a heterogeneous system-on-a chip (SoC) processing environment, the method comprising:
receiving, via at least one integrity application configured for execution on at least one application processing core, the at least one application processing core associated with a first architecture, at least one set of dynamic input data;
receiving, via at least one integrity monitor configured for execution on an integrity processing core, the integrity processing core associated with a second architecture, the at least one set of dynamic input data;
generating, via the at least one integrity application, at least one integrity output based on the received set of dynamic input data and one or more function sets;
generating, via the at least one integrity monitor, at least one integrity result based on the received set of dynamic input data and the one or more function sets;
comparing the at least one integrity output and the at least one integrity result;
and
when the at least one integrity output and the at least one integrity result deviate, initiating at least one fault response.