US 12,461,817 B2
Memory management method, memory storage apparatus and memory control circuit unit
Shih-Jia Zeng, Hsinchu (TW); Chen Yang Tang, Taoyuan (TW); Chen-An Hsu, New Taipei (TW); Chih-Wei Wang, Tainan (TW); and Wei Lin, Taipei (TW)
Assigned to PHISON ELECTRONICS CORP., Miaoli (TW)
Filed by PHISON ELECTRONICS CORP., Miaoli (TW)
Filed on Apr. 2, 2024, as Appl. No. 18/625,174.
Claims priority of application No. 113109310 (TW), filed on Mar. 13, 2024.
Prior Publication US 2025/0291673 A1, Sep. 18, 2025
Int. Cl. G06F 11/10 (2006.01)
CPC G06F 11/1068 (2013.01) [G06F 11/106 (2013.01)] 30 Claims
OG exemplary drawing
 
1. A memory management method, which is adaptable for a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of physical units, and the memory management method comprising:
performing a first operation, comprising at least one of a scan operation, a data read operation, and data decoding operation, on the physical units to obtain a quality estimation parameter corresponding to the physical units;
obtaining index information of a first physical unit among the physical units and establishing a check list according to the quality estimation parameter, wherein the check list records the index information of the first physical unit and a number of the first physical unit is less than a total number of the physical units; and
performing a status scanning on the first physical unit according to the index information in the check list, wherein a result of the status scanning reflects a current data storage quality of the first physical unit.