US 12,461,813 B2
Radiation induced error detection in solid-state devices
Mark Joseph Clemen, Jr., Port Orchard, WA (US); Ethan Cannon, Seattle, WA (US); and Manuel F. Cabanas-Holmen, Roy, WA (US)
Assigned to The Boeing Company, Arlington, VA (US)
Filed by The Boeing Company, Arlington, VA (US)
Filed on Apr. 26, 2023, as Appl. No. 18/307,743.
Prior Publication US 2024/0362112 A1, Oct. 31, 2024
Int. Cl. G06F 11/10 (2006.01); G11C 29/12 (2006.01); G11C 29/42 (2006.01)
CPC G06F 11/1068 (2013.01) [G06F 11/106 (2013.01); G11C 29/12005 (2013.01); G11C 29/42 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A solid-state device comprising:
a substrate that receives an ionizing radiation;
a plurality of logic circuits operational to perform a plurality of logic functions, wherein the plurality of logic circuits are:
located in an area on the substrate; and
individually susceptible to a corruption by the ionizing radiation;
a plurality of integrity cells each initialized to a predetermined state, wherein the plurality of integrity cells are:
located in the area on the substrate;
arranged in a pattern such that a respective subset of logic circuits, in the plurality of logic circuits, surrounds each integrity cell of the plurality of integrity cells; and
individually susceptible to disruption of the predetermined state in response to the ionizing radiation;
an error detection and correction circuit located on the substrate; and
a collection circuit comprising sampling circuitry located on the substrate, wherein the sampling circuitry is operational to cause the collection circuit to:
read the plurality of integrity cells;
assert a report signal to the error detection and correction circuit, wherein the report signal identifies the corruption in a subset of logic circuits in the plurality of logic circuits due to the ionizing radiation in response to reading an incorrect bit in an integrity cell, of the plurality of integrity cells, that is surrounded by the subset of logic circuits; and
reset the integrity cell to the predetermined state in response to reading the incorrect bit.