US 12,461,812 B2
ECC power consumption optimization in memories
Christophe Vincent Antoine Laurent, Agrate Brianza (IT)
Assigned to Micron Technology, Inc., Boise, ID (US)
Appl. No. 18/699,834
Filed by Micron Technology, Inc., Boise, ID (US)
PCT Filed Oct. 18, 2021, PCT No. PCT/IB2021/022225
§ 371(c)(1), (2) Date Apr. 9, 2024,
PCT Pub. No. WO2023/067367, PCT Pub. Date Apr. 27, 2023.
Prior Publication US 2024/0411642 A1, Dec. 12, 2024
Int. Cl. G06F 11/10 (2006.01)
CPC G06F 11/1048 (2013.01) [G06F 11/1068 (2013.01)] 23 Claims
OG exemplary drawing
 
13. A method for operating an array of memory cells, the method comprising:
storing user data in a plurality of memory cells of the memory array;
storing parity data associated with the user data in a number of parity cells of the memory array; and
calculating an ECC syndrome from the stored user data and parity data, wherein the ECC syndrome comprises one or more syndrome portions,
wherein calculating the ECC syndrome comprises:
calculating a first syndrome portion; and
based on the calculated first syndrome portion, deciding whether to calculate or not to calculate a second syndrome portion.