| CPC G06F 11/0793 (2013.01) [G06F 11/0727 (2013.01)] | 20 Claims |

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1. A data storage device comprising:
a memory; and
a processor configured to communicate with the memory and further configured to:
receive an interrupt from a host indicating that a user is experiencing a performance problem with the data storage device; and
in response to receiving the interrupt, take an action to address an issue in the data storage device that is causing the performance problem;
wherein the action comprises updating a time tag with a target digital-to-analog converter (DAC) shift value for a block in the memory.
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