US 12,461,806 B2
ROM/OTP patching using ECC/parity manipulation
Thomas David, Lakeway, TX (US)
Assigned to Silicon Laboratories Inc., Austin, TX (US)
Filed by Silicon Laboratories Inc., Austin, TX (US)
Filed on Jul. 24, 2023, as Appl. No. 18/225,471.
Prior Publication US 2025/0036504 A1, Jan. 30, 2025
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 11/07 (2006.01); G06F 8/65 (2018.01)
CPC G06F 11/0772 (2013.01) [G06F 8/65 (2013.01); G06F 8/66 (2013.01); G06F 11/0793 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A method of updating software located in a read only memory (ROM) device, comprising:
storing a modified function at a patch address in a nonvolatile writable memory device;
creating an entry in a dictionary located in the nonvolatile writable memory device, wherein the entry comprises an original address of an original function in the ROM device and the patch address; and
intentionally causing an ECC (Error Correction Code) error to occur when the original address in the ROM device is accessed so as to invoke an exception.